Nature

An energy-efficient Flash-SAR ADC with two-step flash structure in a 0.18 μm CMOS process

With the increasing performance requirements for data acquisition in applications such as the Internet of things and artificial intelligence, analog-to-digital converters (ADCs) face stringent ...
Nature

Design and test of analog-to-digital converters with enhanced test strategies using built in self test

Analog and Mixed Signal Integrated Circuits (AMS ICs), which have many different components on a single chip, can now be integrated due to technological advancements. However, controllability and ...
TechRepublic

Implementation of Flash ADC Using Multisim Technology

Resolution, speed and power consumption are the three key parameters for an Analog-to-Digital Converter (ADC) and flash ADCs are the fastest type of ADC. In this paper, an effort is made to design ...
TechRepublic

VLSI Design of 12-Bit ADC with 1GSPS in 180nm CMOS Integrating with SAR and Two-Step Flash ADC

In this paper, a novel hybrid ADC consisting of two-step quantizer which has flash ADC and SAR ADC along with resistor string DAC is designed and implemented. This hybrid ADC improves the speed by ...
EDN

112-Gbps LR SerDes PHY Taps CTLE and Time Interleaved Flash ADC to Reduce ADC Resolution

The right balance of CTLE circuitry and flash ADC sizes and number play a key role in minimizing ADC bits to achieve minimum area and power. The design of a state-of-the-art 112-gigabits-per-second ...